Digital and Analog
Electronic Design
Automation - Defining Related Terms
The field of
design automation
(DA) technology, also commonly called
computer-aided design
(CAD) or
computer-aided engineering
(CAE), involves developing computer programs to conduct portions of product
design and manufacturing on behalf of the designer. Related terms :
Bipolar: Type of semiconductor transistor that involves both minority and majority carrier conduction
mechanisms.
BiCMOS: Bipolar/complementary metal-oxide semiconductor. A logic family and form of microelectronic
fabrication.
Branch: A circuit element between two nodes. Branch current is the current through the branch. Branch
voltage is the potential difference between the nodes. The relationship between the branch current and
voltage is defined by the branch constitutive relationship.
Capacitor: Two-terminal electronic device governed by the branch constitutive relationship, Charge = Capacitance
´ Voltage.
CMOS: Complementary metal-oxide semiconductor. A logic family and form of microelectronic fabrication.
Data Flow: Nonprocedural modeling style in which the textual order that statements are written has no bearing
on the order in which they execute.
Design automation: Computer programs that assist engineers in performing digital system development.
Design entry: Area of DA addressing modeling analog and digital electronic systems. Design entry uses a
hierarchy of models involving physical, electrical, logical, functional, and architectural abstractions.
Electromigration: Gradual erosion of metal due to excessive currents.
Fan-in/fan-out: Fan-in defines the maximum number of logic elements that may drive another logic element. Fan-out defines the maximum number of logic elements a logic element may drive.
Finite state machine: Sequential digital system. A finite state machine is classified as either Moore and Mealy.
Gate array: Application-specific integrated circuit implementation technique that realizes a digital system by
programming the metal interconnect of a prefabricated array of gates.
Gate oxide: Dielectric insulating material between the gate and source/drain terminals of a MOS transistor.
Ground bounce: Transient condition when the potential of a ground network varies appreciably from its
uniform static value.
Integrated circuit: Electronic circuit manufactured on a monolithic piece of semiconductor material, typically
silicon.
Kirchoff’s current law: The amount of current entering a circuit node equals the amount of current leaving
a circuit node.
Kirchoff’s voltage law: Any closed loop of circuit branch voltages sums to zero.
Masking defects: Defects in masking plate patterns used for integrated circuit lithography that result in errant
material composition and/or placement.
Multichip modules: Multiple integrated circuits interconnected on a monolithic substrate.
Netlist: Collection of wires that are electrically connected to each other.
NMOS: N-type metal-oxide semiconductor. A logic family and form of microelectronic fabrication.
Node voltage: Potential of a circuit node relative to ground potential.
Programmable logic devices (PLDs): Generic logic devices that can be programmed to realize specific digital
systems. PLDs include programmable logic arrays, programmable array logic, memories, and field-programmable
gate arrays.
Resistor: Two-terminal electronic device governed by the branch constitutive relationship, Voltage = Resistance ´
Current.
Silicon compilation: Synthesis application that generates final physical design ready for silicon fabrication.
Simulation: Computer program that examines the dynamic semantics of a model of a digital system by applying
a series of inputs and generating the corresponding outputs. Major types of simulation include schedule
driven, cycle driven, and message driven.
Skew: Timing difference between two events that are supposed to occur simultaneously.
Standard cell: Application-specific integrated circuit implementation technique that realizes a digital system
using a library of predefined (standard) logic cells.
Synthesis: Computer program that helps generate a digital/analog system design by transforming a high-level
model of abstract behavior into a lower-level model of more-detailed behavior.
Test: Area of EDA that addresses detecting faulty hardware. Test involves stuck-at, scan, signature, coding, and
monitoring techniques.
Timing analysis: Verifies timing behavior of electronic system including rise time, fall time, setup time, hold
time, glitch detection, clock periods, race conditions, reflections, and cross talk.
Transistor: Electronic device that enables a small voltage and/or current to control a larger voltage and/or
current. For analog systems, transistors serves as amplifiers. For digital systems, transistors serve as
switches.
Verification: Area of EDA that addresses validating designs for correct function and expected performance. Verification involves timing analysis, simulation, emulation, and formal proofs.
VHDL: Hardware description language used as an international standard for communicating electronic systems
information.
Via: Connection or contact between two materials that are otherwise electrically isolated.
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